1. Field of the Invention
The present invention generally relates to semiconductor memory devices, and particularly relates to a nonvolatile semiconductor memory device that permits data write and data erase.
2. Description of the Related Art
In nonvolatile semiconductor memory devices for which data write and data erase are electrically performed, each read or write operation disturbs memory cells connected to the same word line that is connected to an accessed memory cell. During a read operation, for example, a word line is activated to a predetermined potential. The potential of the activated word line for read operation is lower than a high potential applied to word lines during a program operation, but affects memory cells in the same manner as during the program operation, thereby possibly injecting electric charge into floating gates. Further, repeated write operations and erase operations degrade the oxide layers of nonvolatile semiconductor memory devices.
Because of these factors as described above, nonvolatile semiconductor memory devices suffer charge loss or charge gain, resulting in the transformation of stored data. Charge loss refers to the leakage of electric charge from the floating gates, and charge gain refers the accumulation of electric charge in the floating gates. Such data transformation occurring in the conventional nonvolatile semiconductor memory devices will be detected only after the transformed data is read from memory cells.
Accordingly, there is a need for a nonvolatile semiconductor memory device which can prevent data transformation even when charge loss or charge gain occurs in floating gates.
It is a general object of the present invention to provide a nonvolatile semiconductor memory device that substantially obviates one or more of the problems caused by the limitations and disadvantages of the related art.
Features and advantages of the present invention will be set forth in the description which follows, and in part will become apparent from the description and the accompanying drawings, or may be learned by practice of the invention according to the teachings provided in the description. Objects as well as other features and advantages of the present invention will be realized and attained by a nonvolatile semiconductor memory device particularly pointed out in the specification in such full, clear, concise, and exact terms as to enable a person having ordinary skill in the art to practice the invention.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, a nonvolatile semiconductor memory device according to the present invention includes a memory cell array, a reference potential generating circuit which generates a first reference potential, a second reference potential higher than the first reference potential, and a third reference potential lower than the first reference potential, a sense amplifier which makes a first determination by comparing a potential of data retrieved from the memory cell array with the first reference potential, and makes a second determination by comparing the potential of the data with one of the second reference potential and the third reference potential, and a comparison unit which compares the first determination with the second determination.
The nonvolatile semiconductor memory device as described above makes a first data determination by performing a normal and routine read operation using the read-operation reference potential, and then makes a second data determination by using the program-verify-purpose reference potential or the erase-verify-purpose reference potential that poses stricter conditions than the read-operation reference potential. If the first data determination and the second data determination are the same, a check result indicative of xe2x80x9cpassxe2x80x9d is output to an exterior of the device or the like, indicating that there is no apparent sign of data transformation. If the first data determination and the second data determination are different, a check result indicative of xe2x80x9cfailxe2x80x9d is output to an exterior of the device or the like, indicating that there is a sign of ongoing data transformation. A controller provided outside the device, for example, detects the check result indicative of the presence or absence of data transformation, and carries out a data rewrite operation or a data overwrite operation with respect to the nonvolatile semiconductor memory device as necessary. Alternatively, operations of an internal control circuit may be configured such that a data rewrite operation or a data overwrite operation is internally performed.
In the nonvolatile semiconductor memory device as described above, operations by the sense amplifier of making the first determination and the second determination and an operation by the comparison unit of comparing the first determination with the second determination may be performed in response to instruction from an exterior of the nonvolatile semiconductor memory device.
According to another aspect of the present invention, the nonvolatile semiconductor memory device as described above further includes a plurality of word lines selectively activated, a plurality counters, each of which is provided for a corresponding one of the word lines, and counts a number as to how many times the corresponding one of the word lines is activated, and a check circuit which checks whether any one of the counters indicates the counted number that exceeds a predetermined number. Then, operations by the sense amplifier of making the first determination and the second determination and an operation by the comparison unit of comparing the first determination with the second determination are performed in response to a finding by the check circuit that one of the counters indicates the counted number that exceeds the predetermined number. With this provision, the nonvolatile semiconductor memory device on its own can check a sign of the presence/absence of ongoing data transformation at appropriate timing, thereby eliminating a need for an external controller or the like to manage the check timing.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.